Multi-beam 4 GHz Microwave Apertures Using Current-Mode DFT Approximation on 65 nm CMOS

A current-mode CMOS design is proposed for realizing receive mode multi-beams in the analog domain using a novel DFT approximation. High-bandwidth CMOS RF transistors are employed in low-voltage current mirrors to achieve bandwidths exceeding 4 GHz with good beam fidelity. Current mirrors realize the coefficients of the considered DFT approximation, which take simple values in $\{0, \pm1, \pm2\}$ only. This allows high bandwidths realizations using simple circuitry without needing phase-shifters or delays. The proposed design is used as a method to efficiently achieve spatial discrete Fourier transform operation across a ULA to obtain multiple simultaneous RF beams. An example using 1.2 V current-mode approximate DFT on 65 nm CMOS, with BSIM4 models from the RF kit, show potential operation up to 4 GHz with eight independent aperture beams.Comment: 7 pages, 4 figures, In: IEEE International Microwave Symposium 201

Frequency-Multiplexed Array Digitization for MIMO Receivers: 4-Antennas/ADC at 28 GHz on Xilinx ZCU-1285 RF SoC

Communications at mm-wave frequencies and above rely heavily on beamforming antenna arrays. Typically, hundreds, if not thousands, of independent antenna channels are used to achieve high SNR for throughput and increased capacity. Using a dedicated ADC per antenna receiver is preferable but it\u27s not practical for very large arrays due to unreasonable cost and complexity. Frequency division multiplexing (FDM) is a well-known technique for combining multiple signals into a single wideband channel. In a first of its kind measurements, this paper explores FDM for combining multiple antenna outputs at IF into a single wideband signal that can be sampled and digitized using a high-speed wideband ADC. The sampled signals are sub-band filtered and digitally down-converted to obtain individual antenna channels. A prototype receiver was realized with a uniform linear array consisting of 4 elements with 250 MHz bandwidth per channel at 28 GHz carrier frequency. Each of the receiver chains were frequency-multiplexed at an intermediate frequency of 1 GHz to avoid the requirement for multiple, precise local oscillators (LOs). Combined narrowband receiver outputs were sampled using a single ADC with digital front-end operating on a Xilinx ZCU-1285 RF SoC FPGA to synthesize 4 digital beams. The approach allows $M$ -fold increase in spatial degrees of freedom per ADC, for temporal oversampling by a factor of $M$

Towards a Low-SWaP 1024-beam Digital Array: A 32-beam Sub-system at 5.8 GHz

Millimeter wave communications require multibeam beamforming in order to utilize wireless channels that suffer from obstructions, path loss, and multi-path effects. Digital multibeam beamforming has maximum degrees of freedom compared to analog phased arrays. However, circuit complexity and power consumption are important constraints for digital multibeam systems. A low-complexity digital computing architecture is proposed for a multiplication-free 32-point linear transform that approximates multiple simultaneous RF beams similar to a discrete Fourier transform (DFT). Arithmetic complexity due to multiplication is reduced from the FFT complexity of $\mathcal{O}(N\: \log N)$ for DFT realizations, down to zero, thus yielding a 46% and 55% reduction in chip area and dynamic power consumption, respectively, for the $N=32$ case considered. The paper describes the proposed 32-point DFT approximation targeting a 1024-beams using a 2D array, and shows the multiplierless approximation and its mapping to a 32-beam sub-system consisting of 5.8 GHz antennas that can be used for generating 1024 digital beams without multiplications. Real-time beam computation is achieved using a Xilinx FPGA at 120 MHz bandwidth per beam. Theoretical beam performance is compared with measured RF patterns from both a fixed-point FFT as well as the proposed multiplier-free algorithm and are in good agreement.Comment: 19 pages, 8 figures, 4 tables. This version corrects a typo in the matrix equations from Section